hubFS: THE place for F#

View the complete topic at: http://cs.hubfs.net/forums/thread/1202.aspx

Posted By: Andyman in Applications of F#
Subject: HDFS - Hardware design using F#
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HDFS is a library written in F# which allows hardware to be designed, simulated and then implemented (using standard design flows via Verilog or VHDL) in FPGA's or ASIC's.

http://www.evilkid.pwp.blueyonder.co.uk/

• Digital logic circuit design in F#
• Structural and behavioural design styles
• VHDL and Verilog netlist generation
• Memory inference
• Instantiation of external HDL models
• Integrated simulator
• Verilog co-simulation (Modelsim only at the moment)
• C, C++ and C# simulation generation
• Integrated waveform viewer
• Resource reporting
• Tree based hierarchy viewer
• Small, but growing, library of utility circuits and functions